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fix riscv64 a_cas inline asm operand sign extension

This patch adds an explicit cast to the int arguments passed to the
inline asm used in the RISC-V's implementation of `a_cas`, to ensure
that they are properly sign extended to 64 bits. They aren't
automatically sign extended by Clang, and GCC technically also doesn't
guarantee that they will be sign extended.
Luís Marques преди 5 години
родител
ревизия
83350eb17b
променени са 1 файла, в които са добавени 1 реда и са изтрити 1 реда
  1. 1 1
      arch/riscv64/atomic_arch.h

+ 1 - 1
arch/riscv64/atomic_arch.h

@@ -15,7 +15,7 @@ static inline int a_cas(volatile int *p, int t, int s)
 		"	bnez %1, 1b\n"
 		"1:"
 		: "=&r"(old), "=&r"(tmp)
-		: "r"(p), "r"(t), "r"(s)
+		: "r"(p), "r"((long)t), "r"((long)s)
 		: "memory");
 	return old;
 }