 Rich Felker
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3a5b9ae7cf
deduplicate __pthread_self thread pointer adjustment out of each arch
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%!s(int64=4) %!d(string=hai) anos |
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Rich Felker
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ea71a9004e
deduplicate TP_ADJ logic out of each arch, replace with TP_OFFSET
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%!s(int64=4) %!d(string=hai) anos |
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Rich Felker
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a4a3e4dbc0
make thread-pointer-loading asm non-volatile
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%!s(int64=6) %!d(string=hai) anos |
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Rich Felker
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9b95fd0944
define and use internal macros for hidden visibility, weak refs
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%!s(int64=6) %!d(string=hai) anos |
 Szabolcs Nagy
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610c5a8524
fix TLS layout of TLS variant I when there is a gap above TP
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%!s(int64=6) %!d(string=hai) anos |
 Andre McCurdy
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749a06b4c5
arm: respect both __ARM_ARCH_6KZ__ and __ARM_ARCH_6ZK__ macros
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%!s(int64=6) %!d(string=hai) anos |
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Rich Felker
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29237f7f5c
rework arm atomic/tp backends to be thumb-compatible and fdpic-ready
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%!s(int64=8) %!d(string=hai) anos |
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Rich Felker
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cb1bf2f321
properly access mcontext_t program counter in cancellation handler
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%!s(int64=9) %!d(string=hai) anos |
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Rich Felker
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74483c5955
mark arm thread-pointer-loading inline asm as volatile
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%!s(int64=9) %!d(string=hai) anos |
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Rich Felker
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0ba35d69c0
remove attribute((const)) from arm __pthread_self inline function
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%!s(int64=9) %!d(string=hai) anos |
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Rich Felker
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4a241f14a6
overhaul ARM atomics/tls for performance and compatibility
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%!s(int64=10) %!d(string=hai) anos |
|
Rich Felker
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e783efa6ef
fix arm thread-pointer/atomic asm when compiling to thumb code
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%!s(int64=10) %!d(string=hai) anos |
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Rich Felker
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1974bffa2d
use inline atomics and thread pointer on arm models supporting them
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%!s(int64=10) %!d(string=hai) anos |
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Rich Felker
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9ec4283b28
add support for TLS variant I, presently needed for arm and mips
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%!s(int64=12) %!d(string=hai) anos |
|
Rich Felker
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834255a3ff
use __attribute__((const)) on arm __pthread_self function
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%!s(int64=12) %!d(string=hai) anos |
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Rich Felker
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d5bde7babb
"optimize" arm __pthread_self
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%!s(int64=13) %!d(string=hai) anos |
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Rich Felker
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d960d4f2cb
initial commit of the arm port
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%!s(int64=13) %!d(string=hai) anos |
