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syscall_arch.h 2.9 KB

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  1. #define __SYSCALL_LL_E(x) \
  2. ((union { long long ll; long l[2]; }){ .ll = x }).l[0], \
  3. ((union { long long ll; long l[2]; }){ .ll = x }).l[1]
  4. #define __SYSCALL_LL_O(x) __SYSCALL_LL_E((x))
  5. #define __SYSCALL_LL_PRW(x) 0, __SYSCALL_LL_E((x))
  6. /* The extra OR instructions are to work around a hardware bug:
  7. * http://documentation.renesas.com/doc/products/mpumcu/tu/tnsh7456ae.pdf
  8. */
  9. #define __asm_syscall(trapno, ...) do { \
  10. __asm__ __volatile__ ( \
  11. "trapa #31\n" \
  12. "or r0, r0\n" \
  13. "or r0, r0\n" \
  14. "or r0, r0\n" \
  15. "or r0, r0\n" \
  16. "or r0, r0\n" \
  17. : "=r"(r0) : __VA_ARGS__ : "memory"); \
  18. return r0; \
  19. } while (0)
  20. static inline long __syscall0(long n)
  21. {
  22. register long r3 __asm__("r3") = n;
  23. register long r0 __asm__("r0");
  24. __asm_syscall(16, "r"(r3));
  25. }
  26. static inline long __syscall1(long n, long a)
  27. {
  28. register long r3 __asm__("r3") = n;
  29. register long r4 __asm__("r4") = a;
  30. register long r0 __asm__("r0");
  31. __asm_syscall(17, "r"(r3), "r"(r4));
  32. }
  33. static inline long __syscall2(long n, long a, long b)
  34. {
  35. register long r3 __asm__("r3") = n;
  36. register long r4 __asm__("r4") = a;
  37. register long r5 __asm__("r5") = b;
  38. register long r0 __asm__("r0");
  39. __asm_syscall(18, "r"(r3), "r"(r4), "r"(r5));
  40. }
  41. static inline long __syscall3(long n, long a, long b, long c)
  42. {
  43. register long r3 __asm__("r3") = n;
  44. register long r4 __asm__("r4") = a;
  45. register long r5 __asm__("r5") = b;
  46. register long r6 __asm__("r6") = c;
  47. register long r0 __asm__("r0");
  48. __asm_syscall(19, "r"(r3), "r"(r4), "r"(r5), "r"(r6));
  49. }
  50. static inline long __syscall4(long n, long a, long b, long c, long d)
  51. {
  52. register long r3 __asm__("r3") = n;
  53. register long r4 __asm__("r4") = a;
  54. register long r5 __asm__("r5") = b;
  55. register long r6 __asm__("r6") = c;
  56. register long r7 __asm__("r7") = d;
  57. register long r0 __asm__("r0");
  58. __asm_syscall(20, "r"(r3), "r"(r4), "r"(r5), "r"(r6), "r"(r7));
  59. }
  60. static inline long __syscall5(long n, long a, long b, long c, long d, long e)
  61. {
  62. register long r3 __asm__("r3") = n;
  63. register long r4 __asm__("r4") = a;
  64. register long r5 __asm__("r5") = b;
  65. register long r6 __asm__("r6") = c;
  66. register long r7 __asm__("r7") = d;
  67. register long r0 __asm__("r0") = e;
  68. __asm_syscall(21, "r"(r3), "r"(r4), "r"(r5), "r"(r6), "r"(r7), "0"(r0));
  69. }
  70. static inline long __syscall6(long n, long a, long b, long c, long d, long e, long f)
  71. {
  72. register long r3 __asm__("r3") = n;
  73. register long r4 __asm__("r4") = a;
  74. register long r5 __asm__("r5") = b;
  75. register long r6 __asm__("r6") = c;
  76. register long r7 __asm__("r7") = d;
  77. register long r0 __asm__("r0") = e;
  78. register long r1 __asm__("r1") = f;
  79. __asm_syscall(22, "r"(r3), "r"(r4), "r"(r5), "r"(r6), "r"(r7), "0"(r0), "r"(r1));
  80. }
  81. #define SYSCALL_IPC_BROKEN_MODE
  82. #define SIOCGSTAMP_OLD (2U<<30 | 's'<<8 | 100 | 8<<16)
  83. #define SIOCGSTAMPNS_OLD (2U<<30 | 's'<<8 | 101 | 8<<16)