atomic_arch.h 2.4 KB

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  1. #define a_cas a_cas
  2. static inline int a_cas(volatile int *p, int t, int s)
  3. {
  4. __asm__ __volatile__ (
  5. "lock ; cmpxchg %3, %1"
  6. : "=a"(t), "=m"(*p) : "a"(t), "r"(s) : "memory" );
  7. return t;
  8. }
  9. #define a_cas_p a_cas_p
  10. static inline void *a_cas_p(volatile void *p, void *t, void *s)
  11. {
  12. __asm__( "lock ; cmpxchg %3, %1"
  13. : "=a"(t), "=m"(*(void *volatile *)p)
  14. : "a"(t), "r"(s) : "memory" );
  15. return t;
  16. }
  17. #define a_swap a_swap
  18. static inline int a_swap(volatile int *p, int v)
  19. {
  20. __asm__ __volatile__(
  21. "xchg %0, %1"
  22. : "=r"(v), "=m"(*p) : "0"(v) : "memory" );
  23. return v;
  24. }
  25. #define a_fetch_add a_fetch_add
  26. static inline int a_fetch_add(volatile int *p, int v)
  27. {
  28. __asm__ __volatile__(
  29. "lock ; xadd %0, %1"
  30. : "=r"(v), "=m"(*p) : "0"(v) : "memory" );
  31. return v;
  32. }
  33. #define a_and a_and
  34. static inline void a_and(volatile int *p, int v)
  35. {
  36. __asm__ __volatile__(
  37. "lock ; and %1, %0"
  38. : "=m"(*p) : "r"(v) : "memory" );
  39. }
  40. #define a_or a_or
  41. static inline void a_or(volatile int *p, int v)
  42. {
  43. __asm__ __volatile__(
  44. "lock ; or %1, %0"
  45. : "=m"(*p) : "r"(v) : "memory" );
  46. }
  47. #define a_and_64 a_and_64
  48. static inline void a_and_64(volatile uint64_t *p, uint64_t v)
  49. {
  50. __asm__ __volatile(
  51. "lock ; and %1, %0"
  52. : "=m"(*p) : "r"(v) : "memory" );
  53. }
  54. #define a_or_64 a_or_64
  55. static inline void a_or_64(volatile uint64_t *p, uint64_t v)
  56. {
  57. __asm__ __volatile__(
  58. "lock ; or %1, %0"
  59. : "=m"(*p) : "r"(v) : "memory" );
  60. }
  61. #define a_inc a_inc
  62. static inline void a_inc(volatile int *p)
  63. {
  64. __asm__ __volatile__(
  65. "lock ; incl %0"
  66. : "=m"(*p) : "m"(*p) : "memory" );
  67. }
  68. #define a_dec a_dec
  69. static inline void a_dec(volatile int *p)
  70. {
  71. __asm__ __volatile__(
  72. "lock ; decl %0"
  73. : "=m"(*p) : "m"(*p) : "memory" );
  74. }
  75. #define a_store a_store
  76. static inline void a_store(volatile int *p, int x)
  77. {
  78. __asm__ __volatile__(
  79. "mov %1, %0 ; lock ; orl $0,(%%rsp)"
  80. : "=m"(*p) : "r"(x) : "memory" );
  81. }
  82. #define a_barrier a_barrier
  83. static inline void a_barrier()
  84. {
  85. __asm__ __volatile__( "" : : : "memory" );
  86. }
  87. #define a_spin a_spin
  88. static inline void a_spin()
  89. {
  90. __asm__ __volatile__( "pause" : : : "memory" );
  91. }
  92. #define a_crash a_crash
  93. static inline void a_crash()
  94. {
  95. __asm__ __volatile__( "hlt" : : : "memory" );
  96. }
  97. #define a_ctz_64 a_ctz_64
  98. static inline int a_ctz_64(uint64_t x)
  99. {
  100. __asm__( "bsf %1,%0" : "=r"(x) : "r"(x) );
  101. return x;
  102. }
  103. #define a_clz_64 a_clz_64
  104. static inline int a_clz_64(uint64_t x)
  105. {
  106. __asm__( "bsr %1,%0 ; xor $63,%0" : "=r"(x) : "r"(x) );
  107. return x;
  108. }