atomic.c 2.5 KB

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  1. #ifndef __SH4A__
  2. #include "atomic.h"
  3. #include "libc.h"
  4. /* gusa is a hack in the kernel which lets you create a sequence of instructions
  5. * which will be restarted if the process is preempted in the middle of the
  6. * sequence. It will do for implementing atomics on non-smp systems. ABI is:
  7. * r0 = address of first instruction after the atomic sequence
  8. * r1 = original stack pointer
  9. * r15 = -1 * length of atomic sequence in bytes
  10. */
  11. #define GUSA_CLOBBERS "r0", "r1", "memory"
  12. #define GUSA_START(mem,old,nop) \
  13. " .align 2\n" \
  14. " mova 1f, r0\n" \
  15. nop \
  16. " mov r15, r1\n" \
  17. " mov #(0f-1f), r15\n" \
  18. "0: mov.l @" mem ", " old "\n"
  19. /* the target of mova must be 4 byte aligned, so we may need a nop */
  20. #define GUSA_START_ODD(mem,old) GUSA_START(mem,old,"")
  21. #define GUSA_START_EVEN(mem,old) GUSA_START(mem,old,"\tnop\n")
  22. #define GUSA_END(mem,new) \
  23. " mov.l " new ", @" mem "\n" \
  24. "1: mov r1, r15\n"
  25. #define CPU_HAS_LLSC 0x0040
  26. int __sh_cas(volatile int *p, int t, int s)
  27. {
  28. if (__hwcap & CPU_HAS_LLSC) return __sh_cas_llsc(p, t, s);
  29. int old;
  30. __asm__ __volatile__(
  31. GUSA_START_EVEN("%1", "%0")
  32. " cmp/eq %0, %2\n"
  33. " bf 1f\n"
  34. GUSA_END("%1", "%3")
  35. : "=&r"(old) : "r"(p), "r"(t), "r"(s) : GUSA_CLOBBERS, "t");
  36. return old;
  37. }
  38. int __sh_swap(volatile int *x, int v)
  39. {
  40. if (__hwcap & CPU_HAS_LLSC) return __sh_swap_llsc(x, v);
  41. int old;
  42. __asm__ __volatile__(
  43. GUSA_START_EVEN("%1", "%0")
  44. GUSA_END("%1", "%2")
  45. : "=&r"(old) : "r"(x), "r"(v) : GUSA_CLOBBERS);
  46. return old;
  47. }
  48. int __sh_fetch_add(volatile int *x, int v)
  49. {
  50. if (__hwcap & CPU_HAS_LLSC) return __sh_fetch_add_llsc(x, v);
  51. int old, dummy;
  52. __asm__ __volatile__(
  53. GUSA_START_EVEN("%2", "%0")
  54. " mov %0, %1\n"
  55. " add %3, %1\n"
  56. GUSA_END("%2", "%1")
  57. : "=&r"(old), "=&r"(dummy) : "r"(x), "r"(v) : GUSA_CLOBBERS);
  58. return old;
  59. }
  60. void __sh_store(volatile int *p, int x)
  61. {
  62. if (__hwcap & CPU_HAS_LLSC) return __sh_store_llsc(p, x);
  63. __asm__ __volatile__(
  64. " mov.l %1, @%0\n"
  65. : : "r"(p), "r"(x) : "memory");
  66. }
  67. void __sh_and(volatile int *x, int v)
  68. {
  69. if (__hwcap & CPU_HAS_LLSC) return __sh_and_llsc(x, v);
  70. int dummy;
  71. __asm__ __volatile__(
  72. GUSA_START_ODD("%1", "%0")
  73. " and %2, %0\n"
  74. GUSA_END("%1", "%0")
  75. : "=&r"(dummy) : "r"(x), "r"(v) : GUSA_CLOBBERS);
  76. }
  77. void __sh_or(volatile int *x, int v)
  78. {
  79. if (__hwcap & CPU_HAS_LLSC) return __sh_or_llsc(x, v);
  80. int dummy;
  81. __asm__ __volatile__(
  82. GUSA_START_ODD("%1", "%0")
  83. " or %2, %0\n"
  84. GUSA_END("%1", "%0")
  85. : "=&r"(dummy) : "r"(x), "r"(v) : GUSA_CLOBBERS);
  86. }
  87. #endif