hongwenjun/musl

réplica de https://git.musl-libc.org/git/musl

Autor	SHA1 Mensaxe	Data
Luís Marques	83350eb17b fix riscv64 a_cas inline asm operand sign extension	%!s(int64=4) %!d(string=hai) anos
Palmer Dabbelt	7d5c5706a0 correct the operand specifiers in the riscv64 CAS routines	%!s(int64=5) %!d(string=hai) anos
Rich Felker	f0eb2e77b2 use register constraint instead of memory operand for riscv64 atomics	%!s(int64=5) %!d(string=hai) anos
Rich Felker	2dcbeabd91 fix riscv64 atomic asm constraints	%!s(int64=5) %!d(string=hai) anos
Rich Felker	0a48860c27 add riscv64 architecture support	%!s(int64=5) %!d(string=hai) anos