hongwenjun/musl

镜像来自 https://git.musl-libc.org/git/musl

作者	SHA1 備註	提交日期
Luís Marques	83350eb17b fix riscv64 a_cas inline asm operand sign extension	4 年之前
Palmer Dabbelt	7d5c5706a0 correct the operand specifiers in the riscv64 CAS routines	5 年之前
Rich Felker	f0eb2e77b2 use register constraint instead of memory operand for riscv64 atomics	5 年之前
Rich Felker	2dcbeabd91 fix riscv64 atomic asm constraints	5 年之前
Rich Felker	0a48860c27 add riscv64 architecture support	5 年之前